1 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 description selects among four differential inputs guaranteed ac performance over temp and voltage: ? dc-to > 3.2gbps data rate throughput ?< 600ps in-to-out t pd ?< 150ps t r /t f ultra low-jitter design: ?< 1ps rms random jitter ?< 10ps pp deterministic jitter ?< 10ps pp total jitter (clock) ?< 0.7ps rms crosstalk-induced jitter unique input isolation design minimizes crosstalk internal input termination unique input termination and v t pin accepts dc- coupled and ac-coupled inputs (lvds, lvpecl, cml) 350mv lvds output swing cmos/ttl compatible mux select power supply 2.5v 5% C40 c to +85 c temperature range available in 32-pin (5mm x 5mm) mlf ? package features 2.5v, 3.2gbps, differential 4:1 l vds multiplexer with internal input termination precision edge ? sy89544u applications sonet/sdh channel select applications fibre channel multi-channel select applications gigabit ethernet multi-channel select rev.: c amendment: /0 issue date: august 2007 the sy89544u is a fast, low-jitter, 4:1 differential mux with an lvds (350mv) compatible output with guaranteed data rate throughput of 3.2gbps over temperature and voltage. the sy89544u differential inputs include a unique, 3-pin internal termination that allows access to the termination network through a v t pin. this feature allows the device to easily interface to different logic standards, both ac- and dc-coupled without external resistor-bias and termination networks. the result is a clean, stub-free, low-jitter interface solution. the sy89544u operates from a single 2.5v supply and is guaranteed over the full industrial temperature range (C40 c to +85 c). for applications that require a 3.3v supply, consider the sy89545l. for applications that require two differential outputs, consider the sy89546u or sy89547l. the sy89544u is part of micrels precision edge ? product family. all support documentation can be found on micrels web site at www.micrel.com. typical performance functional block diagram precision edge ? in0 /in0 v t0 50 ? 50 ? in1 /in1 v t1 50 ? 50 ? q /q 0 1 mux 4:1 mux l vds in2 /in2 v t2 50 ? 50 ? 2 in3 /in3 v t3 50 ? 50 ? 3 s0 s1 sel0 sel1 precision edge is a registered trademark of micrel, inc. micro leadframe and mlf are registered trademarks of amkor technology, inc. 0 50 100 150 200 250 300 350 400 0123456 output amplitude (mv) frequency (ghz) output amplitude vs. frequency
2 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 pin number pin name pin function 4, 2, 32, in0, /in0, differential inputs: these input pairs are the differential signal inputs to the device. inputs 30, 27, 25, 23, 21 in1, /in1, accept ac- or dc-coupled signals as small as 100mv. each pin of a pair internally in2, /in2, terminates to a v t pin through 50 ? . note that these inputs will default to an indeterminate in3, /in3 state if left open. unused differential input pairs can be terminated by connecting one input to v cc and the complementary input to gnd through a 1k ? resistor. the v t pin is to be left open in this configuration. please refer to the input interface applications section for more details. 3, 31, 26, 22 vt0, vt1, input termination center-tap: each side of the differential input pair, terminates to a v t vt2, vt3 pin. the v t0 , v t1 , v t2 , v t3 pins provide a center-tap to a termination network for maximum interface flexibility. see input interface applications section for more details. 6, 19 sel0, sel1 these single-ended ttl/cmos compatible inputs select the inputs to the multiplexers. note that these inputs are internally connected to a 25k ? pull-up resistor and will default to a logic high state if left open. input switching threshold is v cc /2. 1, 5, 8, vcc positive power supply: bypass with 0.1 f||0.01 f low esr capacitors. the 0.01 f 17, 20, 24, 28, 29 capacitor should be as close to a v cc pin as possible. 10, 11 q, /q differential outputs: this lvds output pair is the output of the device. it is a logic function of the in0, in1, in0, in1 and sel0 inputs. please refer to the truth table for details. 7, 9, 12, 13, 16, 18 gnd, ground: ground pin and exposed pad must be connected to the same ground plane. exposed pad 14, 15 nc no connect (unused pins). pin description package/ordering information 24 23 22 21 20 19 18 17 vcc in3 vt3 /in3 vcc sel1 gnd vcc vcc /in0 vt0 /in0 vcc sel0 gnd vcc 1 2 3 4 5 6 7 8 910111213141516 32 31 30 29 28 27 26 25 vcc vcc /in1 vt1 in1 in2 vt2 /in2 gnd gnd /q q gnd nc nc gnd 32-pin mlf ? ordering information (1) package operating package lead part number type range marking finish sy89544umi mlf-32 industrial sy89544u sn-pb sy89544umitr (2) mlf-32 industrial sy89544u sn-pb sy89544umg (3) mlf-32 industrial sy89544u with pb-free pb-free bar-line indicator nipdau sy89544umgtr (2, 3) mlf-32 industrial sy89544u with pb-free pb-free bar-line indicator nipdau notes: 1. contact factory for die availability. dice are guaranteed at t a = 25 c, dc electricals only. 2. tape and reel. 3. recommended for new designs.
3 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v cc ) ................................. C0.5v to +4.0v input voltage (v in ) ........................................ C0.5v to v cc termination current (3) source or sink current on v t ..................................... 100ma input current source or sink current on in, /in .......................... 50ma lead temperature (soldering, 20 sec.) ................... +260 c storage temperature (ts) ...................... C65 c to +150 c operating ratings (2) supply voltage (v cc ) .......................... +2.375v to +2.625v ambient temperature (t a ) ........................ C40 c to +85 c package thermal resistance (4) mlf ? ( ja ) still-air ................................................................ 35 c/w 500lfpm .............................................................. 28 c/w mlf ? ( jb ) junction-to-board ............................................... 20 c/w t a = C40 c to +85 c; unless otherwise stated. symbol parameter condition min typ max units v cc power supply 2.375 2.5 2.625 v i cc power supply current no load, max. v cc (6) 50 70 ma r diff_in differential input resistance 80 100 120 ? (in-to-/in) r in input resistance 40 50 60 ? (in-to-v t , /in-to-v t ) v ih input high voltage 1.2 v cc v (in, /in) v il input low voltage 0 v ih C0.1 v (in, /in) v in input voltage swing notes 7 0.1 v cc v (in, /in) v diff_in differential input voltage swing notes 7 0.2 v |in C /in| in-to-v t voltage from input to v t 1.8 v notes: 1. permanent device damage may occur if the ratings in the absolute maximum ratings section are exceeded. this is a stress rat ing only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. exp osure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. due to the limited drive capability, use for input of the same package only. 4. package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the pcb . jb uses 4-layer ja in still-air unless otherwise stated. 5. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established . 6. includes current through internal 50 ? pull-ups. 7. see single-ended and differential swings section for v in and v diff_in definitions. dc electrical characteristics (5)
4 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 v cc = 2.5v 5%; t a = C40 c to +85 c; r l = 100 ? across q and /q, unless otherwise stated. symbol parameter condition min typ max units v oh output high voltage see figure 5a. 1.475 v (q, /q) v ol output low voltage see figure 5a. 0.925 v (q, /q) v out output voltage swing see figures 1a, 5a. 250 350 mv (q, /q) v diff-out differential output voltage swing see figure 1b. 500 700 mv | q - /q | v ocm output common mode voltage see figure 5b. 1.125 1.275 v (q, /q) ? v ocm change in common mode voltage see figure 5b. C50 +50 mv (q, /q) lvds outputs dc electrical characteristics (9) v cc = 2.5v 5%; t a = C40 c to +85 c; unless otherwise stated. symbol parameter condition min typ max units v ih input high voltage 2.0 v cc v v il input low voltage 0.8 v i ih input high current 40 a i il input low current C300 a note: 9. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established . lvttl/cmos dc electrical characteristics (9)
5 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 v cc = 2.5v 5%; t a = C40 c to +85 c; r l = 100 ? across q and /q, unless otherwise stated. symbol parameter condition min typ max units f max maximum operating frequency nrz data 3.2 gbps v out 200mv clock 4 ghz t pd differential propagation delay in-to-q 310 410 510 ps sel-to-q 200 400 700 ps t skew input-to-input skew note 11 520ps part-to-part skew note 12 200 ps t jitter data random jitter (rj) note 13 1ps rms deterministic jitter (dj) note 14 10 ps pp clock total jitter (tj) note 15 10 ps pp cycle-to-cycle jitter note 16 1ps rms crosstalk-induced jitter note 17 0.7 ps rms adjacent channel t r , t f output rise/fall time at full output swing. 35 80 150 ps (20% to 80%) notes: 10. measured with 100mv input swing. see timing diagrams section for definition of parameters. high-frequency ac parameters ar e guaranteed by design and characterization. 11. input-to-input skew is the difference in propagation delay between any two inputs to the output under identical conditions. 12. part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. 13. random jitter is measured with a k28.7 comma detect character pattern, measured at 1.25gbps and 3.2gbps. 14. deterministic jitter is measured at 1.25gbps and 3.2gbps, with both k28.5 and 2 23 C1 prbs pattern. 15. total jitter definition: with an ideal clock input of frequency f max , no more than one output edge in 10 12 output edges will deviate by more than the specified peak-to-peak jitter value. 16. cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, t n Ct n-1 where t is the time between rising edges of the output signal. 17. crosstalk is measured at the output while applying two similar frequencies to adjacent inputs that are asynchronous with res pect to each other at the inputs. ac electrical characteristics (10)
6 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 in0 in1 in2 in3 sel0 sel1 q /q 0xxx 0001 1xxx 0010 x0xx 1001 x1xx 1010 xx0 x 0 101 xx1 x 0 110 xxx 0 1 101 xxx 1 1 110 single-ended and differential swings v in , v out 350mv (typ.) figure 1a. single-ended voltage swing v diff_in , v diff_out 700mv (typ.) figure 1b. differential voltage swing timing diagram in /in q /q t pd sel sel-to-q q /q t pd figure 2. timing diagram truth table
7 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 functional characteristics v cc = 2.5v, t a = 25 c. 200mhz output time (500ps/div.) output swing (70mv/div.) q /q 2.5ghz output time (50ps/div.) output swing (70mv/div.) q /q oc-12 mask (2 23 ?1 prbs) time (300ps/div.) output swing (70mv/div.) 1xfc mask (2 23 ?1 prbs) time (200ps/div.) output swing (70mv/div.) 1xgbe mask (2 23 ?1 prbs) time (150ps/div.) output swing (70mv/div.) 2xfc mask (2 23 ?1 prbs) time (100ps/div.) output swing (70mv/div.) 2xgbe mask (2 23 ?1 prbs) time (70ps/div.) output swing (70mv/div.) 3.2gbps eye (2 23 ? 1 prbs) time (70ps/div.) output swing (70mv/div.)
8 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 input and output stage internal termination 50 ? 50 ? v cc gnd /in v t in figure 3. simplified differential input stage input interface applications lv p ecl in /in sy89544u v cc r p r p gnd gnd f or v cc = 2.5v, r p = 50 ? . v t gnd v cc C 1.4v figure 4d. lvpecl interface (ac-coupled) l vds in /in sy89544u v cc gnd v t nc figure 4e. lvds interface cml in /in v t nc sy89544u v cc gnd figure 4a. cml interface (dc-coupled) lv p ecl in /in sy89544u v cc v cc 0.01 f r p f or v cc = 2.5v, r p = 19 ? . gnd v t figure 4c. lvpecl interface (dc-coupled) cml in /in v t sy89544u v cc gnd gnd v cc C 1.4v figure 4b. cml interface (ac-coupled)
9 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 output interface applications lvds specifies a small swing of 350mv typical, on a nominal 1.25v common mode above ground. the common mode voltage has tight limits to permit large variations in ground between an lvds driver and receiver. also, change in common mode voltage, as a function of data input, is kept to a minimum, to keep emi low. 100 ? v out gnd v oh , v ol v oh , v ol figure 5a. lvds differential measurement gnd v ocm , ? v ocm 50 ? 50 ? figure 5b. lvds common mode measurement part number function data sheet link sy89542u 2.5 v, 3.2gbps dual, differential 2:1 lvds http://www.micrel.com/_pdf/hbw/sy89542u.pdf multiplexer with internal input termination sy89543l 3.3v, 3.2gbps dual, differential 2:1 lvds http://www.micrel.com/_pdf/hbw/sy89543l.pdf multiplexer with internal input termination sy89545l 3.3v, 3.2gbps 4:1 lvds multiplexer with internal http://www.micrel.com/_pdf/hbw/sy89545l.pdf input termination sy89546u 2.5v 3.2gbps, differential 4:1 lvds multiplexer http://www.micrel.com/_pdf/hbw/sy89546u.pdf with 1:2 fanout and internal input termination sy89547l 3.3v 3.2gbps, differential 4:1 lvds multiplexer http://www.micrel.com/_pdf/hbw/sy89547l.pdf with 1:2 fanout and internal input termination mlf ? application note www.amkor.com/products/notes_paper s/mlf_appnote_0902.pdf hbw solutions new products and applications www.micrel.com/product-info/products/solutions.shtml related micrel products and support documentation
10 precision edge ? sy89544u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchasers use or sale of micrel products for use in life support appliances, devices or systems is at purchasers own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2005 micrel, incorporated. di scl ai me r: this is only a recommendation based on information available to micrel from its suppliers. actual land pattern may have to be significantly different due to various materials and processes used in pcb assembly. micrel makes no representation or warra nty of performance based on the recommended land pattern." gray shaded circles indicates thermal via. size should be .300 mm in diameter and via hole pitch is 1.0 mm and it should be connected to gnd plane for maximum thermal characteristic. pcb thermal consideration for 32-pin mlf ? package (always solder, or equivalent, the exposed pad to the pcb) package notes: 1. package meets level 2 qualification. 2. all parts are dry-packaged before shipment. 3. exposed pads must be soldered to a ground for proper thermal management. 32 lead micro leadframe ? (mlf-32)
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